Field
The disclosed embodiments relate to the design of a linear equalizer for reversing distortion incurred in a signal that is transmitted through a channel. More specifically, the disclosed embodiments relate to the design of a continuous time linear equalizer that uses both cross-coupled cascodes and inductive peaking to reverse distortion in a signal transmitted through a channel by attenuating lower frequencies and amplifying higher frequencies.
Related Art
In communication circuitry design, a continuous time linear equalizer (CTLE) is often used as a simple and effective component to equalize channel loss and extend the link bandwidth. Compared with other sophisticated equalization techniques, using a CTLE is typically the most economic option in terms of power consumption and complexity. Traditionally, an active CTLE is implemented through a source-degeneration network as illustrated in FIG. 1A. As illustrated in FIG. 1A, CTLE 100 receives a differential input signal comprising input1 123 and input2 124, and performs an equalization operation on this differential input signal to generate a differential output signal comprising output1 133 and output2 134.
Unfortunately, the equalizer design illustrated in FIG. 1A suffers from a number of performance issues. Low frequency signals gains are usually attenuated below zero dB by the equalizer. As a consequence, extra amplification is needed after the CTLE, which increases the complexity and power consumption in applications. Also, in order to boost high frequency gain and extend the link bandwidth, it is necessary to provide a larger transconductance gm for transistors 117 and 118, which implies using larger device geometries and consuming more power. Furthermore, larger device geometries are associated with larger parasitics, which can significantly slow down the operation of the CTLE.
Hence, what is needed is an equalizer design that overcomes the above-described problems.